drivers: spi: atmel: Only access available chip-select registers#25
drivers: spi: atmel: Only access available chip-select registers#25sticha wants to merge 659 commits intolinux4sam:masterfrom
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Turn the informative message about no vmmc/vqmmc regulator found in debug one. There is no need to indicate that something optional is missing. Moreover, it can bring confusion, people who doesn't know it is optional may consider these messages as warnings or errors. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
The eMMC supports double data rate with a 1.8 voltage. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
As the SDHCI controller needs the 1.8V line to be always enabled for some eMMC configurations, set the proper "regulator-always-on" property to the board DTS files. Note that the sdhci classical regulator definitions doesn't suit our controller for this 1.8V purpose. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Set the gclk's parent clock to audio clock. Signed-off-by: Songjun Wu <songjun.wu@atmel.com>
Add code to support the mono channel audio. Signed-off-by: Songjun Wu <songjun.wu@atmel.com>
Following changes that appeared in lk 4.0.0, the gadget udc driver for some ARM based Atmel SoCs (e.g. at91sam9x5 and sama5d3 families) incorrectly deduced full-speed USB link speed even when the hardware had negotiated a high-speed link. The fix is to make sure that the UDPHS Interrupt Enable Register value does not mask the SPEED bit in the Interrupt Status Register. For a mass storage gadget this problem lead to failures when the host had a USB 3 port with the xhci_hcd driver. If the host was a USB 2 port using the ehci_hcd driver then the mass storage gadget worked (but probably at a lower speed than it should have). Signed-off-by: Douglas Gilbert <dgilbert@interlog.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: <stable@vger.kernel.org> linux4sam#4.0+ Fixes: 9870d89 ("usb: atmel_usba_udc: Mask status with enabled irqs") Signed-off-by: Felipe Balbi <balbi@ti.com>
Conflicts: drivers/pinctrl/pinctrl-at91-pio4.c
Add CONFIG_CAN_M_CAN=y to enable Bosch M_CAN devices driver. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Due to the CAN Message RAM can be shared by multi M_CAN instances, so the base address of the CAN Message RAM for CAN0 and CAN1 are shared at 0x00210000. The default base address of the CAN Message RAM for CAN0 and CAN1 are configured at 0x200000 in CAN Memories Address-based Register. To avoid conflict with SRAM map for pm, change them to 0x2100000 in the AT91Bootstrap. As said in SAMA5D2 datasheet, the CAN clock is recommended to use frequencies of 20, 40 or 80 MHz, and to select the UPLLCK(480 MHz) as source clock. So, the "assigned-clock-rates" property has three options: 20000000, 40000000, and 80000000. The "assigned-clock-parents" property should be referred to utmi fixedly. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
The sama5d2_defconfig is about to be removed, align the generic one with sama5d2 support Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
dma_addr_t may be defined as 32 or 64 bit depending on configuration,
so it cannot be printed using the normal format strings, as
gcc correctly warns:
drivers/dma/at_xdmac.c: In function 'at_xdmac_interleaved_queue_desc':
drivers/dma/at_xdmac.c:922:51: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=]
This changes the format strings to use the special "%pad" format
string that prints a dma_addr_t, and changes the arguments so we
pass the address by reference as required.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Fix typo in a macro which was not used until now. It explains why there is no error at compilation time. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Fixes: e1f7c9e "dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver" Cc: stable@vger.kernel.org # 3.19 and later
When setting the channel configuration register, the perid field is not set to 0 since it is useless for mem2mem transfers. Unfortunately, a device has 0 as perid. It could cause spurious flags status because the controller could mix some events from the two channels. For that reason, use the highest perid value for mem2mem transfers since it doesn't match the perid of other devices. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
The code was not in agreement with the comments. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Add runtime PM support and use runtime_force_suspend|resume() for system PM. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
atmel-mci-regs.h is only included in atmel-mci.c so move its content in the driver and do some cleanup in these definitions to remove checkpatch errors. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Remove atmel-mci-regs.h file since it has been merged in atmel-mci.c. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
The atmci_convert_chksize() function is no more valid for controller version 0x600 due to the introduction of '2 data' chunk size. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
This reverts commit 9072c49.
This option can be handy for connecting an USB mouse of keyboard. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This SoC is now handled normally by the generic sama5_defconfig, no need to keep a special defconfig. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
…nux-4.1-at91 Conflicts: arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
This patch prevents the driver from crashing when more than 4 SPI slaves are configured with the cs-gpios DT option.
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| #define AUTOSUSPEND_TIMEOUT 2000 | ||
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| #define SPI_NUM_CSR 4 |
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There is no limit to the number of cs-gpio we can use. So why use this limit?
| if (!atmel_spi_is_v2(as)) | ||
| spi_writel(as, CSR0 + 4 * spi->chip_select, csr); | ||
| spi_writel(as, CSR0 + 4 * spi_chip_select_capped, csr); | ||
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I do feel that there is a pending issue here. It may be related to the use of internal CS selection. But it's not related to cs-gpio... So we have to find another way to prevent this crash.
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Currently the driver effectively only uses one CSR at a time, therefore we could always use CSR0 instead of selecting the CSR register depending on spi->chip_select.
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According to the bug documented in the comment above "cs_activate", maybe it is better to always use CSR1?
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It is now fixed in mainline with the following series: |
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I will close this as the patch was accepted in upstream long time ago. |
This patch prevents the driver from crashing when more than 4
SPI slaves are configured with the cs-gpios DT option.
Without this patch, if a 5th SPI slave is configured, "spi_writel(as, CSR0 + 4 * spi_chip_select_capped, asd->csr);" will unintendedly overwrite a register that is not a CSR register and the driver crashes.