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HemangGadhaviHemangGadhavi
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Added an additional files for register definitions.
1 parent 522fa9a commit 7c614d2

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2 files changed

+214
-1
lines changed

2 files changed

+214
-1
lines changed

‎lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h‎

Lines changed: 150 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,9 @@
1616
+ sizeof(GPR_PPC64))
1717
#define VMX_PPC64_OFFSET(regname) (offsetof(VMX_PPC64, regname) \
1818
+ sizeof(GPR_PPC64) + sizeof(FPR_PPC64))
19+
#define VSX_PPC64_OFFSET(regname) \
20+
(offsetof(VSX_PPC64, regname) + sizeof(GPR_PPC64) + sizeof(FPR_PPC64) + \
21+
sizeof(VMX_PPC64))
1922
#define GPR_PPC64_SIZE(regname) (sizeof(((GPR_PPC64 *)NULL)->regname))
2023

2124
#include "Utility/PPC64_DWARF_Registers.h"
@@ -52,6 +55,21 @@
5255
NULL, NULL, NULL, \
5356
}
5457

58+
#define DEFINE_VSX_PPC64(reg, lldb_kind) \
59+
{ \
60+
#reg, \
61+
NULL, \
62+
16, \
63+
VSX_PPC64_OFFSET(reg), \
64+
lldb::eEncodingVector, \
65+
lldb::eFormatVectorOfUInt32, \
66+
{ppc64_dwarf::dwarf_##reg##_ppc64, ppc64_dwarf::dwarf_##reg##_ppc64, \
67+
lldb_kind, LLDB_INVALID_REGNUM, vsx_##reg##_ppc64}, \
68+
NULL, \
69+
NULL, \
70+
NULL, \
71+
}
72+
5573
// General purpose registers.
5674
// EH_Frame, Generic, Process Plugin
5775
#define PPC64_REGS \
@@ -194,7 +212,71 @@
194212
NULL, \
195213
NULL, \
196214
NULL, \
197-
}, /* */
215+
}, \
216+
DEFINE_VSX_PPC64(vs0, LLDB_INVALID_REGNUM), \
217+
DEFINE_VSX_PPC64(vs1, LLDB_INVALID_REGNUM), \
218+
DEFINE_VSX_PPC64(vs2, LLDB_INVALID_REGNUM), \
219+
DEFINE_VSX_PPC64(vs3, LLDB_INVALID_REGNUM), \
220+
DEFINE_VSX_PPC64(vs4, LLDB_INVALID_REGNUM), \
221+
DEFINE_VSX_PPC64(vs5, LLDB_INVALID_REGNUM), \
222+
DEFINE_VSX_PPC64(vs6, LLDB_INVALID_REGNUM), \
223+
DEFINE_VSX_PPC64(vs7, LLDB_INVALID_REGNUM), \
224+
DEFINE_VSX_PPC64(vs8, LLDB_INVALID_REGNUM), \
225+
DEFINE_VSX_PPC64(vs9, LLDB_INVALID_REGNUM), \
226+
DEFINE_VSX_PPC64(vs10, LLDB_INVALID_REGNUM), \
227+
DEFINE_VSX_PPC64(vs11, LLDB_INVALID_REGNUM), \
228+
DEFINE_VSX_PPC64(vs12, LLDB_INVALID_REGNUM), \
229+
DEFINE_VSX_PPC64(vs13, LLDB_INVALID_REGNUM), \
230+
DEFINE_VSX_PPC64(vs14, LLDB_INVALID_REGNUM), \
231+
DEFINE_VSX_PPC64(vs15, LLDB_INVALID_REGNUM), \
232+
DEFINE_VSX_PPC64(vs16, LLDB_INVALID_REGNUM), \
233+
DEFINE_VSX_PPC64(vs17, LLDB_INVALID_REGNUM), \
234+
DEFINE_VSX_PPC64(vs18, LLDB_INVALID_REGNUM), \
235+
DEFINE_VSX_PPC64(vs19, LLDB_INVALID_REGNUM), \
236+
DEFINE_VSX_PPC64(vs20, LLDB_INVALID_REGNUM), \
237+
DEFINE_VSX_PPC64(vs21, LLDB_INVALID_REGNUM), \
238+
DEFINE_VSX_PPC64(vs22, LLDB_INVALID_REGNUM), \
239+
DEFINE_VSX_PPC64(vs23, LLDB_INVALID_REGNUM), \
240+
DEFINE_VSX_PPC64(vs24, LLDB_INVALID_REGNUM), \
241+
DEFINE_VSX_PPC64(vs25, LLDB_INVALID_REGNUM), \
242+
DEFINE_VSX_PPC64(vs26, LLDB_INVALID_REGNUM), \
243+
DEFINE_VSX_PPC64(vs27, LLDB_INVALID_REGNUM), \
244+
DEFINE_VSX_PPC64(vs28, LLDB_INVALID_REGNUM), \
245+
DEFINE_VSX_PPC64(vs29, LLDB_INVALID_REGNUM), \
246+
DEFINE_VSX_PPC64(vs30, LLDB_INVALID_REGNUM), \
247+
DEFINE_VSX_PPC64(vs31, LLDB_INVALID_REGNUM), \
248+
DEFINE_VSX_PPC64(vs32, LLDB_INVALID_REGNUM), \
249+
DEFINE_VSX_PPC64(vs33, LLDB_INVALID_REGNUM), \
250+
DEFINE_VSX_PPC64(vs34, LLDB_INVALID_REGNUM), \
251+
DEFINE_VSX_PPC64(vs35, LLDB_INVALID_REGNUM), \
252+
DEFINE_VSX_PPC64(vs36, LLDB_INVALID_REGNUM), \
253+
DEFINE_VSX_PPC64(vs37, LLDB_INVALID_REGNUM), \
254+
DEFINE_VSX_PPC64(vs38, LLDB_INVALID_REGNUM), \
255+
DEFINE_VSX_PPC64(vs39, LLDB_INVALID_REGNUM), \
256+
DEFINE_VSX_PPC64(vs40, LLDB_INVALID_REGNUM), \
257+
DEFINE_VSX_PPC64(vs41, LLDB_INVALID_REGNUM), \
258+
DEFINE_VSX_PPC64(vs42, LLDB_INVALID_REGNUM), \
259+
DEFINE_VSX_PPC64(vs43, LLDB_INVALID_REGNUM), \
260+
DEFINE_VSX_PPC64(vs44, LLDB_INVALID_REGNUM), \
261+
DEFINE_VSX_PPC64(vs45, LLDB_INVALID_REGNUM), \
262+
DEFINE_VSX_PPC64(vs46, LLDB_INVALID_REGNUM), \
263+
DEFINE_VSX_PPC64(vs47, LLDB_INVALID_REGNUM), \
264+
DEFINE_VSX_PPC64(vs48, LLDB_INVALID_REGNUM), \
265+
DEFINE_VSX_PPC64(vs49, LLDB_INVALID_REGNUM), \
266+
DEFINE_VSX_PPC64(vs50, LLDB_INVALID_REGNUM), \
267+
DEFINE_VSX_PPC64(vs51, LLDB_INVALID_REGNUM), \
268+
DEFINE_VSX_PPC64(vs52, LLDB_INVALID_REGNUM), \
269+
DEFINE_VSX_PPC64(vs53, LLDB_INVALID_REGNUM), \
270+
DEFINE_VSX_PPC64(vs54, LLDB_INVALID_REGNUM), \
271+
DEFINE_VSX_PPC64(vs55, LLDB_INVALID_REGNUM), \
272+
DEFINE_VSX_PPC64(vs56, LLDB_INVALID_REGNUM), \
273+
DEFINE_VSX_PPC64(vs57, LLDB_INVALID_REGNUM), \
274+
DEFINE_VSX_PPC64(vs58, LLDB_INVALID_REGNUM), \
275+
DEFINE_VSX_PPC64(vs59, LLDB_INVALID_REGNUM), \
276+
DEFINE_VSX_PPC64(vs60, LLDB_INVALID_REGNUM), \
277+
DEFINE_VSX_PPC64(vs61, LLDB_INVALID_REGNUM), \
278+
DEFINE_VSX_PPC64(vs62, LLDB_INVALID_REGNUM), \
279+
DEFINE_VSX_PPC64(vs63, LLDB_INVALID_REGNUM), /* */
198280

199281
typedef struct _GPR_PPC64 {
200282
uint64_t r0;
@@ -312,6 +394,72 @@ typedef struct _VMX_PPC64 {
312394
uint32_t vrsave;
313395
} VMX_PPC64;
314396

397+
typedef struct _VSX_PPC64 {
398+
uint32_t vs0[4];
399+
uint32_t vs1[4];
400+
uint32_t vs2[4];
401+
uint32_t vs3[4];
402+
uint32_t vs4[4];
403+
uint32_t vs5[4];
404+
uint32_t vs6[4];
405+
uint32_t vs7[4];
406+
uint32_t vs8[4];
407+
uint32_t vs9[4];
408+
uint32_t vs10[4];
409+
uint32_t vs11[4];
410+
uint32_t vs12[4];
411+
uint32_t vs13[4];
412+
uint32_t vs14[4];
413+
uint32_t vs15[4];
414+
uint32_t vs16[4];
415+
uint32_t vs17[4];
416+
uint32_t vs18[4];
417+
uint32_t vs19[4];
418+
uint32_t vs20[4];
419+
uint32_t vs21[4];
420+
uint32_t vs22[4];
421+
uint32_t vs23[4];
422+
uint32_t vs24[4];
423+
uint32_t vs25[4];
424+
uint32_t vs26[4];
425+
uint32_t vs27[4];
426+
uint32_t vs28[4];
427+
uint32_t vs29[4];
428+
uint32_t vs30[4];
429+
uint32_t vs31[4];
430+
uint32_t vs32[4];
431+
uint32_t vs33[4];
432+
uint32_t vs34[4];
433+
uint32_t vs35[4];
434+
uint32_t vs36[4];
435+
uint32_t vs37[4];
436+
uint32_t vs38[4];
437+
uint32_t vs39[4];
438+
uint32_t vs40[4];
439+
uint32_t vs41[4];
440+
uint32_t vs42[4];
441+
uint32_t vs43[4];
442+
uint32_t vs44[4];
443+
uint32_t vs45[4];
444+
uint32_t vs46[4];
445+
uint32_t vs47[4];
446+
uint32_t vs48[4];
447+
uint32_t vs49[4];
448+
uint32_t vs50[4];
449+
uint32_t vs51[4];
450+
uint32_t vs52[4];
451+
uint32_t vs53[4];
452+
uint32_t vs54[4];
453+
uint32_t vs55[4];
454+
uint32_t vs56[4];
455+
uint32_t vs57[4];
456+
uint32_t vs58[4];
457+
uint32_t vs59[4];
458+
uint32_t vs60[4];
459+
uint32_t vs61[4];
460+
uint32_t vs62[4];
461+
uint32_t vs63[4];
462+
} VSX_PPC64;
315463

316464
static lldb_private::RegisterInfo g_register_infos_ppc64[] = {
317465
PPC64_REGS
@@ -325,5 +473,6 @@ static_assert((sizeof(g_register_infos_ppc64) /
325473
#undef DEFINE_FPR_PPC64
326474
#undef DEFINE_GPR_PPC64
327475
#undef DEFINE_VMX_PPC64
476+
#undef DEFINE_VSX_PPC64
328477

329478
#endif // DECLARE_REGISTER_INFOS_PPC64_STRUCT

‎lldb/source/Utility/PPC64_DWARF_Registers.h‎

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,70 @@ enum {
119119
dwarf_vr29_ppc64,
120120
dwarf_vr30_ppc64,
121121
dwarf_vr31_ppc64,
122+
dwarf_vs0_ppc64,
123+
dwarf_vs1_ppc64,
124+
dwarf_vs2_ppc64,
125+
dwarf_vs3_ppc64,
126+
dwarf_vs4_ppc64,
127+
dwarf_vs5_ppc64,
128+
dwarf_vs6_ppc64,
129+
dwarf_vs7_ppc64,
130+
dwarf_vs8_ppc64,
131+
dwarf_vs9_ppc64,
132+
dwarf_vs10_ppc64,
133+
dwarf_vs11_ppc64,
134+
dwarf_vs12_ppc64,
135+
dwarf_vs13_ppc64,
136+
dwarf_vs14_ppc64,
137+
dwarf_vs15_ppc64,
138+
dwarf_vs16_ppc64,
139+
dwarf_vs17_ppc64,
140+
dwarf_vs18_ppc64,
141+
dwarf_vs19_ppc64,
142+
dwarf_vs20_ppc64,
143+
dwarf_vs21_ppc64,
144+
dwarf_vs22_ppc64,
145+
dwarf_vs23_ppc64,
146+
dwarf_vs24_ppc64,
147+
dwarf_vs25_ppc64,
148+
dwarf_vs26_ppc64,
149+
dwarf_vs27_ppc64,
150+
dwarf_vs28_ppc64,
151+
dwarf_vs29_ppc64,
152+
dwarf_vs30_ppc64,
153+
dwarf_vs31_ppc64,
154+
dwarf_vs32_ppc64,
155+
dwarf_vs33_ppc64,
156+
dwarf_vs34_ppc64,
157+
dwarf_vs35_ppc64,
158+
dwarf_vs36_ppc64,
159+
dwarf_vs37_ppc64,
160+
dwarf_vs38_ppc64,
161+
dwarf_vs39_ppc64,
162+
dwarf_vs40_ppc64,
163+
dwarf_vs41_ppc64,
164+
dwarf_vs42_ppc64,
165+
dwarf_vs43_ppc64,
166+
dwarf_vs44_ppc64,
167+
dwarf_vs45_ppc64,
168+
dwarf_vs46_ppc64,
169+
dwarf_vs47_ppc64,
170+
dwarf_vs48_ppc64,
171+
dwarf_vs49_ppc64,
172+
dwarf_vs50_ppc64,
173+
dwarf_vs51_ppc64,
174+
dwarf_vs52_ppc64,
175+
dwarf_vs53_ppc64,
176+
dwarf_vs54_ppc64,
177+
dwarf_vs55_ppc64,
178+
dwarf_vs56_ppc64,
179+
dwarf_vs57_ppc64,
180+
dwarf_vs58_ppc64,
181+
dwarf_vs59_ppc64,
182+
dwarf_vs60_ppc64,
183+
dwarf_vs61_ppc64,
184+
dwarf_vs62_ppc64,
185+
dwarf_vs63_ppc64,
122186
};
123187

124188
} // namespace ppc64_dwarf

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